Tag: Congestion
OpenSparc-T2 Synthesis-Part 4 (Block Level Impl till GDSII)
by kiran on Jun.08, 2009, under EDA
This is final and last part of the Open Sparc T2 processor synthesis series. Actually, I wont be posting anything new here, but just for completeness sake of the series, I’m creating a new post. Sorry about this, but I dont see any point in reposting the same thing twice.
The P&R script for block level implementation can be picked from my earlier post Nova H.264 decoder core P&R script
Click to continue reading “OpenSparc-T2 Synthesis-Part 4 (Block Level Impl till GDSII)”
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- OpenSparc-T2 Synthesis-Part 4 (Block Level Impl till GDSII) June 9, 2009
- OpenSparc-T2 Synthesis -Part 2 ( Top level Synthesis ) June 9, 2009
- OpenSparc-T2 Synthesis -Part 3 ( Hierarchical Floorplan Creation/Refining ) June 9, 2009
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