This is final and last part of the Open Sparc T2 processor synthesis series. Actually, I wont be posting anything new here, but just for completeness sake of the series, I’m creating a new post. Sorry about this, but I dont see any point in reposting the same thing twice.
The P&R script for block level implementation can be picked from my earlier post Nova H.264 decoder core P&R script
The flow starts from post fix time script. You need to import the fix cell final volcano after the SMC are implemented using fix cell $m $l -prototype in part-3 and start from there.
I have to admit that you might need to tweak the P&R script to get good QOR since processor cores are higher frequencies and timing closure approach will be different. But the script is a good start and can easily take to 60-70% mark .
For folks who are reading this directly, there are 4 parts for OpenSparcT2 processor core and the order is as follows
1. Part 1: This post deals with bottom-up synthesis of all major blocks in OpenSparcT2
2. Part-2 : This is top level synthesis & integration of all the synthesized sub blocks in part 1
3. part-3 : This is to build the floorplan for the full processor core by partitioning/shaping, pin assignment, block level timing budgets. After Part-3 is done, the blocks are ready for full P&R implementation.
4. Part4 : This is final part and allows you to complete the block level P&R implementation all the way to GDSII
For the records, I have used Opteron m/c with Linux and used Magma Design Automation’s Implementation tools (Talus Platform – Talus Design & Talus Vortex ) along with the best of the breed hierarchical floorplan tool Hydra.
Thanks for reading!! Hope this 4 part series helps you to synthesize and implement the full opensparc-T2 processor . Have fun!!!
