About the Author
Kiran Bulusu is a Strategic Account Management professional in Electronics Design Automation (EDA)/Semiconductor Industry.
He has experience in Product Positioning,Revenue Generation, building customer relationships and converting them into strategic accounts. His strategies and technical competence helped win many aggressive pre-sales campaigns in EDA and Semiconductor industry.
His technical experience is primarily starting from logic synthesis to GDSII including DFT/Formal Verification/Hierarchical Floorplanning on various process all the way from 0.13u to 32nm . He has worked ASIC designs implementation on couple of high performance processors from ARM (Cortex A9/15)/MIPS (74K,1004K,1024K) /Sun (OpenSparc T2 ) and Graphics Cores (SGX) from Imagination Technologies , UK .
His other interests include Management Consulting,Marketing and Entrepreneurship. He is currently employed at Cadence Design Systems.
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Daily Archives: January 21, 2007
Personalization of Silicon and need for Design Flow Automation
I was just looking at some of the latest anouncements and the prototypes at the recent CES show and if you look at the trend and the products that consumers are crazy about, and if you want to sum it up..The market is all about how much personalization can the users do in the product. Every consumer wants to see himself/herself in the product..so what does this translate it to for the Semi-Conductor industry folks.. “ Personalization of Silicon “..
Look at the famous Apple IPOD ..Many see it as the symbol of the youth…So the closer the silicon is to the hearts the consumers, the better are the chances for product success…But this personalization all comes with a price…Everyone knows pricing is one key element which determines the reach and sucess of the product .
So, the big question is , how can the IC industry reduce its IC design and packaging (I mean chip packaging and not feature/product packaging ) costs and yet be profitable? The answer partly comes from the EDA industry. Automation of the design flow. It is the degree of automation and the accuracy of the results which it can deliver over a short span of time . Multi-million transistors ( 10M+ transistors) and SOC’s are becoming common and the TTM is becoming shorter day by day. For example, with-in few days/weeks of the Apple’s IPHONE announcement, LG released a similar competetive product with almost the same functionality as IPHONE. Imagine how fierece the competetion is. Each single day counts.
How can the design teams manage this pressure ? Marketing teams often wants to add new features in the last minute. People involved in the IC Design knows what this translates to. It is not a matter of simple ECO . Sometimes a small feature addition can lead to couple of weeks delay. I know a customer who has to do go through the entire design cycle twice as marketing asked them to add 2 more new features each time and this effected their tape-out schedules by 6 weeks..Not every Semi-conductor company can afford such a delay ( especially folks operating in Consumer Electronics market segment ). So , the solution doesnt come by adding few more engineers or simply delaying the product launch.. You need design tools which are smart enough to detect the incremental changes anywhere in the flow and automatically do the appropriate steps in the design flow with no or minimum intervention from designer.
Not many EDA companies are recognizing the importance of the automation and their perception of automation is awefully wrong. I would say in years to come, the company which manages to bring the true “automation” of the design flow to the industry will emerge as the real winner.
If your customer makes money, you make money. It is as simple as that.
BTW, You need engineers to find smarter ways to design and bring “true” personalization of the silicon

